Nvidia SASS Control Code Viewer
on 12.06.2024 by Kuter Dinel.
Paste your cuobjdump SASS output to the left and the table in the right will update automatically. Make sure the disassembly has the raw byte sequence in comments /* 0x... */.
For more info on NVIDIA control codes, please read; Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking, Optimizing batched winograd convolution on GPUs and NervenaSystems MaxAs wiki Control-Codes page
/*0000*/ LDC R1, c[0x0][0x28] ; /* 0x00000a00ff017b82 */
/* 0x000e220000000800 */
/*0010*/ S2R R25, SR_TID.X ; /* 0x0000000000197919 */
/* 0x000e620000002100 */
/*0020*/ ULDC UR6, c[0x0][0x220] ; /* 0x0000880000067ab9 */
/* 0x000fe20000000800 */
/*0030*/ ULDC.64 UR4, c[0x0][0x240] ; /* 0x0000900000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ UISETP.GT.AND UP0, UPT, UR6, 0x4, UPT ; /* 0x000000040600788c */
/* 0x000fe2000bf04270 */
/*0050*/ IADD3 R1, R1, -0x68, RZ ; /* 0xffffff9801017810 */
/* 0x001fe20007ffe0ff */
/*0060*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */
/* 0x000fc6000f8e023f */
/*0070*/ ULDC UR5, c[0x0][0x248] ; /* 0x0000920000057ab9 */
/* 0x000fe40000000800 */
/*0080*/ USEL UR5, UR5, 0x1, UP0 ; /* 0x0000000105057887 */
/* 0x000fc80008000000 */